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holt integrated circuits www.holtic.com 1 october, 2010 hi-8592, hi-8593, hi-8594 single-rail arinc 429 differential line driver ds8592 rev. b 10/10 pin configuration (top view) ( see page 9 for additional package pin confgurations ) table 1. function table tx1in tx0in slp txaout txbout slope 0 0 x 0v 0v n/a 0 1 0 -5v 5v 10s 0 1 1 -5v 5v 1.5s 1 0 0 5v -5v 10s 1 0 1 5v -5v 1.5s 1 1 x hi-z hi-z n/a general description the hi-8592 bus interface product is a silicon gate cmos device designed as a line driver in accordance with the arinc 429 bus specifcations. the part in - cludes a negative voltage converter allowing it to oper - ate from a single +5v supply using only two external ca - pacitors. the part also features high-impedance outputs (tri-state) when both data inputs are taken high, allowing multiple line drivers to be connected to a common bus. the hi-8593 and hi-8594 are reduced pin count ver - sions of hi-8592 which do not incorporate the negative voltage converter. these devices are compatible with holts existing hi-8570 and hi-8571 respectively, with the added advantage of the tri-state outputs. for even smaller board footprint, versions are also available in leadless, surface mount qfn-style packages. logic inputs feature built-in 2,000v minimum esd input protection as well as 5v or 3.3v logic level compatibility. products with 5 ohm or 37.5 ohm resistors in series with each arinc output are available to allow the use of external resistors for lightning protection. the hi-859x series of line drivers are intended for use where logic signals must be converted to arinc 429 levels such as when using an fpga or the hi-3584 arinc 429 serial transmitter/dual receiver. the family of parts are available in industrial -40 o c to +85 o c, or extended, -55 o c to +125 o c temperature rang - es. optional burn-in is available on the extended tem - perature range. features ? single +5v supply ? negative voltage generated on-chip (hi-8592) ? digitally selectable rise and fall times ? tri-state outputs ? plastic 8 & 14-pin thermally enhanced soic packages available ? 5 ohm or 37.5 ohm output resistance ? industrial and extended temperature ranges ? burn-in available slp tx0in tx1in gnd v+ txbout txaout v- hi-8593ps 8-pin plastic small outline (esoic) nb 1 8 2 3 4 5 6 7 slp tx0in tx1in gnd v+ ampb ampa v- hi-8594ps 8-pin plastic small outline (esoic) nb 1 8 2 3 4 5 6 7 hi-8592ps 14-pin plastic small outline (esoic) nb 14 ampb 13 txbout 12 ampa 11 txaout 10 v- 9 gnd v+ 1 slp 2 tx0in 3 tx1in 4 gnd 5 cap+ 6 7 cap- 8 v+
hi-8592, hi-8593, hi-8594 holt integrated circuits 2 block diagram current control -5v 5v one null zero control logic txbout -5v 5v slp esd protection & voltage translation tx0in tx1in one null zero a side ampa 5v v+ gnd ampb cap+ cap- v+ switched capacitor dc-dc inverter v- clock generation txaout c out c fly -5v c supply control logic current control b side 32.5? 5? 32.5? 5? figure 1. hi-8592 block diagram
hi-8592, hi-8593, hi-8594 holt integrated circuits 3 pin descriptions table 2. pin descriptions pin function description v+ power +5v power supply slp input output slew rate control. high selects arinc 429 high-speed. low selects arinc 429 low-speed. tx0in input data input zero tx1in input data input one gnd power ground supply cap+ analog positive connection for external capacitor, c fly cap- analog negative connection for external capacitor, c fly v- power -5v supply, may be connected to supply or used with on-chip negative sup - ply converter txaout output arinc high output with 37.5 ohms series resistance ampa output arinc high output with 5 ohms series resistance txbout output arinc low output with 37.5 ohms series resistance ampb output arinc low output with 5 ohms series resistance arinc 429 bus ampa ampb txaout txbout hi-8592 -5v c out = 47f cap+ cap- c fly = 4.7f tx0in tx1in c supply = 68f v+ = 5v hi-3584a slp gnd figure 2. application example
hi-8592, hi-8593, hi-8594 holt integrated circuits 4 functional description figure 1 is a block diagram of the line driver. the chip requires a positive 5v supply at v+. the negative 5v supply at v- may be from an external source or may be provided using the on-chip negative rail generator by connecting the two external capacitors, c fly and c out . currents for slope control are set by on-chip resistors. the tx0in and tx1in inputs receive logic signals from a control transmitter chip such as the hi-3584. tx - aout and txbout hold each side of the arinc bus at ground until one of the inputs becomes a one. if for example tx1in goes high, a charging path is enabled to 5v on an a side internal capacitor while the b side is enabled to -5v. the charging current is selected by the slp pin. if the slp pin is high, the capacitor is nominally charged from 10% to 90% in 1.5s. if slp is low, the rise and fall times are 10s. the reduced pin-count hi-8593 and hi-8594 require an external -5v supply. a unity gain buffer receives the internally generated slopes and differentially drives the arinc line. cur - rent is limited by the series output resistors at each pin. there are no fuses at the outputs of the hi-859x family. the hi-8593 has 37.5 ohms in series with each txout output and the hi-8594 has 5 ohms in series with each amp output. the amp outputs are for applications where external series resistance is required, typically for lightning protection devices. both output types are available on the hi-8592. holt application note an-300 describes suitable lightning protection schemes. all devices feature tri-stateable outputs to allow multiple line drivers to be connected to the same arinc 429 bus. setting tx1in and tx0in both to a logic 1 puts the outputs in the high-impedance state. the hi-8592 family of line drivers are built using high- speed cmos technology. care should be taken to en - sure the v+ and v- supplies are locally decoupled to re - duce noise. an application example is shown in figure 2. absolute maximum ratings supply voltages v+ ........................................................... +7v v- ........................................................... -7v dc current per input pin ................................... +10ma power dissipation at 25 o c plastic soic ........... 1.0w, derate 10mw/ o c ceramic dip ......... 0.5w, derate 7mw/ o c solder temperature ......................... 275 o c for 10sec storage temperature ....................... -65 o c to +150 o c note: the hi-8592 family of drivers are available in small-foot - print, thermally enhanced soic and qfn (chip-scale) pack - ages. these packages include a metal heat sink located on the bottom surface of the device. this heat sink should be soldered down to the printed circuit board for optimum thermal dissipation. the heat sink is electrically isolated from the chip and can be soldered to any ground or power plane. recommended operating conditions supply voltages v+ ................................... +4.85v to +5.25v v- ................................... -5.25v to -4.85v temperature range industrial screening .............. -40 o c to +85 o c hi-temp screening .............. -55 o c to +125 o c note: stresses above absolute maximum ratings or outside recommended operating conditions may cause permanent damage to the device. these are stress ratings only. opera - tion at the limits is not recommended.
hi-8592, hi-8593, hi-8594 holt integrated circuits 5 electrical characteristics table 3. dc electrical characteristics v+ = +5v, v- = -5v (hi-8593/4 only), t a = operating temperature range (unless otherwise stated) parameters symbol test conditions min typ max units input voltage (tx1in, tx0in, slp) high low v ih v il 2.1 - - - v+ 0.5 v v input current (tx1in, tx0in, slp) source sink i ih i il v in = 0v v in = 5v - - - - 0.1 0.1 a a arinc output voltage (differential) one zero null v diff1 v diff0 v diffn no load; txaout - txbout no load; txaout - txbout no load; txaout - txbout 9 -11 -0.5 10 -10 0 11 -9 0.5 v v v arinc output voltage (ref. to gnd) one or zero null v dout v nout no load & magnitude at pin no load 4.5 -0.25 5.0 0 5.5 0.25 v v operating supply current v+ gnd v- i dd i gnd i ee slp = v+ tx1in & tx0in = 0v: no load tx1in & tx0in = 0v: no load tx1in & tx0in = 0v: no load - - -16 22 10 -10 28 16 - ma ma ma arinc output impedance txout pins amp pins z out 37.5 5 ohms ohms arinc output tri-state current i oz v- < v out < v+, t a = 125 o c tx0in = tx1in = v+ -1.0 0 +1.0 a
hi-8592, hi-8593, hi-8594 holt integrated circuits 6 table 4. converter characteristics v+ = +5v, v- = -5v (hi-8593/4 only), t a = operating temperature range (unless otherwise stated) parameters symbol test conditions min typ max units start-up transient (v+, v-) t start - - 10 ms operating switching frequency f sw 425 550 670 khz recommended capacitors c fly c out c supply c out / c fly >= 10 c supply >= c out (connect from v+ to gnd) 2.2 22 47 4.7 47 68 - - - f f f table 5. ac electrical characteristics v+ = +5v, v- = -5v (hi-8593/4 only), t a = operating temperature range (unless otherwise stated) parameters symbol test conditions min typ max units line driver propogation delay output high to low output low to high t phlx t plhx defned in figure 2, no load - - 500 500 - - ns ns line driver transition times high speed output high to low output low to high low speed output high to low output low to high t fx t rx t fx t rx slp = v+ pin 1 = logic 1 pin 1 = logic 1 slp = v+ pin 1 = logic 0 pin 1 = logic 0 1.0 1.0 5.0 5.0 1.5 1.5 10.0 10.0 2.0 2.0 15.0 15.0 s s s s input capacitance (logic) 1 c in - - 10 pf output capacitance (tri-state) 1 c out tx0in = tx1in = v+ - - 1.5 pf notes: 1. guaranteed but not tested
hi-8592, hi-8593, hi-8594 holt integrated circuits 7 0v 10v -10v 5v 0v 5v 0v 10% 90% t fx 10% 90% t phlx 10% tx1in tx0in v diff (txaout - txbout) t fx t rx t rx t plhx t phlx t plhx figure 3. line driver timing package thermal characteristics maximum arinc load package style 1 arinc 429 data rate supply current (ma) 2 junction temp, t j ( o c) t a = 25 o c t a = 85 o c t a = 125 o c t a = 25 o c t a = 85 o c t a = 125 o c 14-lead plastic esoic 5 low speed 3 30 31 32 33 93 134 high speed 4 36 36 37 35 95 135 txaout and txbout shorted to ground 6,7,8 package style 1 arinc 429 data rate supply current (ma) 2 junction temp, t j ( o c) t a = 25 o c t a = 85 o c t a = 125 o c t a = 25 o c t a = 85 o c t a = 125 o c 14-lead plastic esoic 5 low speed 3 89 82 77 53 111 149 high speed 4 87 81 77 52 111 149 notes: 1. all data taken in still air. 2. at 100% duty cycle, 5v power supplies. 3. low speed: data rate = 12.5 kbps, load: r = 400 ohms, c = 30 nf. 4. high speed: data rate = 100 kbps, load: r = 400 ohms, c = 10 nf. data not presented for c = 30 nf as this is considered unrealistic for high speed operation. 5. 14 lead plastic esoic (thermally enhanced soic with built in heat sink). heat sink not soldered. 6. similar results would be obtained with txaout shorted to txbout. 7. for applications requiring survival with continuous short circuit, operation above tj = 175c is not recommended. 8. data will vary depending on air fow and the method of heat sinking employed.
hi-8592, hi-8593, hi-8594 holt integrated circuits 8 ordering information part number lead finish blank tin / lead (sn / pb) solder f 100% matte tin (pb-free, rohs compliant) part number temperature range flow burn in i -40 o c to +85 o c i no t -55 o c to +125 o c t no m -55 o c to +125 o c m yes part number package description ps 14 pin plastic small outline - nb esoic (14hne) pc 24 pin plastic qfn (24pcs) cr 14 pin cerdip (14d). note: not available pb-free hi - 8592 xx x x part number lead finish blank tin / lead (sn / pb) solder f 100% matte tin (pb-free, rohs compliant) part number temperature range flow burn in i -40 o c to +85 o c i no t -55 o c to +125 o c t no m -55 o c to +125 o c m yes part number package description ps 8 pin plastic small outline - nb esoic (8hne) cr 8 pin cerdip (8d). note: not available pb-free part number output resistance 8593 37.5 ohms 8594 5 ohms hi - 859x xx x x legend: esoic - thermally enhanced small outline package (soic with built-in heat sink) nb - narrow body
hi-8592, hi-8593, hi-8594 holt integrated circuits 9 additional pin configurations note: all power and ground pins must be connected. hi-8592cr 14-pin cerdip 14 ampb 13 txbout 12 ampa 11 txaout 10 v- 9 gnd v+ 1 slp 2 tx0in 3 tx1in 4 gnd 5 cap+ 6 7 cap- 8 v+ slp tx0in tx1in gnd v+ txbout txaout v- hi-8593cr 8-pin cerdip 1 8 2 3 4 5 6 7 slp tx0in tx1in gnd v+ ampb ampa v- hi-8594cr 8-pin cerdip 1 8 2 3 4 5 6 7 23 slp 22 v+ 24 - tx0in 2 tx1in 3 cap+ 6 15 v- 18 txbout 17 ampa 16 txaout cap- 9 hi-8592pc 24-lead 5mm x 5mm qfn gnd 12 gnd 5 - 1 21 v+ 20 - 19 ampb 14 v- 13 gnd v+ 11 v+ 10 - 8 - 7 gnd 4
hi-8592, hi-8593, hi-8594 holt integrated circuits 10 revision history revision date description of change ds8592, rev. new 6/21/10 initial release rev. a 7/1/10 corrected typo in features (no fxed rise and fall time) rev. b 10/28/10 rev. a had incorrect package drawing (soic-8). replaced with correct esoic-8.
hi-8592, hi-8593, hi-8594 holt integrated circuits 11 package dimensions package type: 14hne .033 .017 (.83 8 .43) bsc = basic spacing between centers is theoretical true position dimension and has no tolerance. (jedec standard 95) detail a .0025 .0015 (.063 5 .04) .0165 .003 (.41 9 .089) .341 .004 (8.6 5 .10) .0085 .001 (.22 0 .029) see detai l a .153 .003 (3.8 7 .06) to p v iew bottom v iew .055 .005 (1.39 7 .13) .050 (1.27) bsc .236 .008 (6.0 0 .20) .100 (2.54) typ .270 (6.86) typ electrically isolated heat sink pad on bottom of package. connect to any ground or power plane for optimu m thermal dissipation. 14-pin plastic small outline (esoic) - nb (narrow body, thermally enhanced) inches (millimeters) 0 o to 8 o 8-pin plastic small outline (esoic) - nb (narrow body, thermally enhanced) inches (millimeters) package type: 8hne 0 o to 8 o p in 1 see detail a .154 .004 (3.9 0 .09) .194 .004 (4.9 2 .09) .236 .008 (5.9 9 .21) .033 .017 (.83 8 .432) .0165 .003 (.41 9 .089) .140 .01 (3.5 6 .26) .100 .01 (2.5 4 .25) .0025 .002 (.06 4 .038) .055 .005 (1.39 7 .127) .050 (1.27) bsc .0085 .0015 (.21 6 .038) bsc = basic spacing between centers is theoretical true position dimension and has no tolerance. (jedec standard 95) to p v iew bottom v iew electrically isolated heat sink pad on bottom of package. connect to any ground or power plane for optimu m thermal dissipation. detail a
hi-8592, hi-8593, hi-8594 holt integrated circuits 12 14-pin cerdip inches (millimeters) package type: 14d .767 ma x (19.48 max) .200 max (5.080 max) .056 typ (1.422 typ) .050 max (1.27 max) .005 mi n (.127 min) .015 min (.381 min) 0 o to 15 o .180 max (4.572 max) .125 mi n (3.175 min) .018 + .003 (.457 + .760) .100 bsc (2.54) .310 + .010 (7.874 + .254) .288 + .003 (7.32 + .08) .010 + .002 (.254 + .051) package type: 8d 8-pin cerdip .380 .004 (9.652 .102) .005 min. (.127 min. ) .314 .003 (7.976 .076) .200 max. (5.080 max. ) .248 .003 (6.299 .076) .100 .008 (2.540 .203) .039 .006 (.991 .154) .163 .037 (4.140 .940) .018 .006 (.457 .152 ) .056 .006 (1.422 .152) .015 min. (.381 min.) .350 .030 (8.890 .762) .010 .006 (.254 .152) base plane seating plane
hi-8592, hi-8593, hi-8594 holt integrated circuits 13 24-pin plastic chip-scale package (qfn) millimeters package type: 24pcs bsc = basic spacing between centers is theoretical true position dimension and has no tolerance. (jedec standard 95) 3.65 + .15 0.45 typ. 0.93 max heat sink pad on bottom of package. heat sink can float or can be connected to v+. do not connect heat sink to gnd 3.65 + .15 0.65 bsc 0.35 typ. top view bottom view 0.025 max 5.00 + .05 5.00 + .05

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